1. Field of the Invention
The present invention relates to an image processing apparatus and an image processing method for processing image data.
2. Description of the Related Art
An image processing apparatus has conventionally been proposed, which processes packet data obtained by dividing a page image into blocks and adding header information to compressed image data of each block, in order to efficiently save the memory and parallel-execute a plurality of functions in an image processing apparatus such as an MFP (Japanese Patent Laid-Open No. 2002-008002). To reduce the load of data management/transfer control on the CPU of an image processing apparatus, there is also proposed an image processing apparatus having a packet table, a chain table, and a DMA capable of handling them, as described in Japanese Patent Laid-Open No. 2002-281293.
A system as a combination of these conventional techniques has widely been used. This system can increase the image processing speed by suppressing the load on the CPU, parallel-executing a plurality of functions, and performing parallel image processes for packet data. In this system, respective image processing units are formed from chips and the like in accordance with a plurality of image processes performed for each block image data. These chips include a chip for executing processing immediately before printer output, and a chip for executing processing immediately after scanner input.
Each chip appropriately configures an internal circuit in consideration of parallel processes and the circuit scale. For example, functions for performing specific processing are parallel-formed in respective chips. The internal configurations of some chips are switched using the scheduling function of software.
Input jobs include jobs with high priority using a printer and scanner, and those with lower priorities. When some chips are switched for a high-priority job to perform processing while a plurality of chips execute a low-priority job, software processing for scheduling by the CPU is necessary.
When switching a chip, transfer of an image from the CPU to the chip to be switched needs to be interrupted. It is also necessary to acquire and hold information (set parameters and the progress of the operation) upon the interruption. When restarting the low-priority job, restart processing needs to be done to set parameters again and resume data transfer. The load of software necessary for scheduling increases owing to the need for these processes.